IBM PPC440X5 Manual de usuario descargar pdf (Pagina 539)

100

101

User’s Manual

Preliminary PPC440x5 CPU Core

instalfa.fm.

September 12, 2002

Page 539 of 589

extsb

RA, RS

Extend the sign of byte (RS)

24:31

Place the result in RA.

311

extsb.

CR[CR0]

extsh

RA, RS

Extend the sign of halfword (RS)

16:31

Place the result in RA.

312

extsh.

CR[CR0]

icbi

RA, RB

Invalidate the instruction cache block which contains the effec-

tive address (RA|0) + (RB).

313

icbt

RA, RB

Load the instruction cache block which contains the effective

address (RA|0) + (RB).

311

iccci

RA, RB Invalidate the instruction cache array. 316

icread

RA, RB

Read tag and data information from the instruction cache line

selected using effective address bits 17:26. The effective

address is calculated by (RA|0) + (RB).

Place the instruction selected by effective address bits 27:29 in

ICDBDR; place the tag information in ICDBTRH and ICDBTRL.

317

inslwi

RA, RS, n, b

Insert from left immediate. (n > 0)

(RA)

b:b+n–1

← (RS)

0:n–1

Extended mnemonic for

rlwimi RA,RS,32−b,b,b+n−1

399

inslwi.

Extended mnemonic for

rlwimi. RA,RS,32−b,b,b+n−1

CR[CR0]

insrwi

RA, RS, n, b

Insert from right immediate. (n > 0)

(RA)

b:b+n–1

← (RS)

32–n:31

Extended mnemonic for

rlwimi RA,RS,32−b−n,b,b+n−1

399

insrwi.

Extended mnemonic for

rlwimi. RA,RS,32−b−n,b,b+n−1

CR[CR0]

isel

RT, RA, RB,

CRb

RT ← (RA|0) if CRb = 1, else RT ← (RB) 319

isync

Synchronize execution context by flushing the prefetch queue. 320

RT, D(RA)

Load address. (RA ≠ 0)

D is an offset from a base address that is assumed to be (RA).

(RT) ← (RA) + EXTS(D)

Extended mnemonic for

addi RT,RA,D

258

lbz

RT, D(RA)

Load byte from EA = (RA|0) + EXTS(D) and pad left with zeroes,

(RT) ←

0 || MS(EA,1).

321

lbzu

RT, D(RA)

Load byte from EA = (RA|0) + EXTS(D) and pad left with zeroes,

(RT) ←

0 || MS(EA,1).

Update the base address,

(RA) ← EA.

322

lbzux

RT, RA, RB

Load byte from EA = (RA|0) + (RB) and pad left with zeroes,

(RT) ←

0 || MS(EA,1).

Update the base address,

(RA) ← EA.

323

lbzx

RT, RA, RB

Load byte from EA = (RA|0) + (RB) and pad left with zeroes,

(RT) ←

0 || MS(EA,1).

324

lha

RT, D(RA)

Load halfword from EA = (RA|0) + EXTS(D) and sign extend,

(RT) ← EXTS(MS(EA,2)).

325

Table A-1. PPC440x5 Instruction Syntax Summary (continued)

Mnemonic Operands Function

Other Registers

Changed

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